The VDMOS model as used in LTspice simulator can model power MOSFET's nicely.
I have extracted parameters for the IRF640 (aka IRFP240) and IRF9640 (aka IRFP9240) and provide a PDF white paper showing each step so you can do the same for your own MOSFET's.
I also extracted the Exicon lateral MOSFET's 10N20, 10P20 and 20N20 ,20P20 from accurate pulse tester measurements. The jig data is available in a spreadsheet and the pulse tester has a PDF on how it works. It's not hard to make one if you are reasonably familiar with electronics.
There is also a PDF on a subcircuit that adds quasisaturation to the VDMOS. The files are also provided free for downloading. All downloads here are free under Creative Commons 4 Attribution (overriding my Copyright), no liability accepted. Please let me know if you find errors (use Contact).
LTspice files below for the 'VDMOS parameter extraction' paper (see PDF downloads):
LTspice files below for the 'Simple pulse jig for power MOSFETs' paper (see PDF downloads):
LTspice files below for the 'Subcircuit to add quasisaturation' paper (see PDF above):
Download "VDMOS-internal-Temp-co-jig" here