The VDMOS model as used in LTspice simulator can model power MOSFET's nicely.  

I have extracted parameters for the IRF640 (aka IRFP240) and IRF9640 (aka IRFP9240) and provide a PDF white paper showing each step so you can do the same for your own MOSFET's.


I also extracted the Exicon lateral MOSFET's 10N20, 10P20 and 20N20 ,20P20 from accurate pulse tester measurements. The jig data is available in a spreadsheet and the pulse tester has a PDF on how it works. It's not hard to make one if you are reasonably familiar with electronics.


There is also a PDF on a subcircuit that adds quasisaturation to the VDMOS. The files are also provided free for downloading. All downloads here are free under Creative Commons 4 Attribution  (overriding my Copyright), no liability accepted. Please let me know if you find errors (use Contact).

Part 1 only (Ver 1v0)
Adobe Acrobat Document 386.7 KB

LTspice files below for the 'VDMOS parameter extraction' paper (see PDF downloads):

  1. Download "Compare Extractions.asc" LTspice jig here
  2. Download "Plot gate charge.asc" jig here 
  3. Download "Plot Cds.asc" jig here 
  4. Download "Plot body diode.asc" jig here 
Part 2 (Ver 1v0) includes Pt. 1
Adobe Acrobat Document 1.1 MB
Ver 1v0
Adobe Acrobat Document 441.2 KB

LTspice files below for the 'Simple pulse jig for power MOSFETs' paper (see PDF downloads):

  1. Download "VDMOS+EKV-10x20+20x20" LTspice jigs and Spreadsheet here 
  2. Download "VDMOS-20N20+20P20-measured-data" here 
Ver 1.0
Adobe Acrobat Document 304.6 KB

LTspice files below for the 'Subcircuit to add quasisaturation' paper (see PDF above):

  1. Download "VDMOS-20x20-qs-Tht3B" LTspice electrothermal subcircuit jig here 
  2. Download "VDMOS-FCD6320-Inv-Qs2" LTspice jig here 
  3. Download "VDMOS-4049-QuasiSat" LTspice jig here

Download "VDMOS-internal-Temp-co-jig" here