The VDMOS model as used in LTspice simulator can model power MOSFET's nicely.
Mike Engelhardt updated the VDMOS (May 2019) to include temperature parameters. I have updated my earlier IRF's and Exicon lateral's. They can be downloaded here for LTspice XVII OR LT-IV here.
Updated Tutorial PDF for extracting parameters for the IRFP240 and IRFP9240. Download PDF below.
A simple jig does pulse measurements (DIY breadboard it - may need Scope). Download PDF below.
To simulate CMOS inverters eg for guitar overload effects then you need to use a MOSFET model with quasisaturation. The LTspice VDMOS lacks quasisaturation. It can be added using a subcircuit. Download PDF below. BTW SuperSpice already has a VDMOS with quasisaturation.
My files are also provided free under Creative Commons 4 Attribution (over-riding my Copyright) and no liability is accepted. Please let me know if you find errors (use Contact).
LTspice jigs for the 'VDMOS parameter extraction' Tutorial PDF (Part 1),
Download "Compare-Extraction-jigs-IRFP240-IRFP9240.zip" has 6 LTspice jigs here.
LTspice files below for the 'Simple pulse jig for power MOSFETs' :
Dec 2021 superseded: Subcircuit to add Quasisaturation to the VDMOS (Ver 0v1) white paper here and LTspice demo files here
Triode+SIT+jFET subcircuit using the VDMOS
Dec 2021: This is an ambitious subcircuit! I may change it into 3 separate versions some day.
updated white paper here. models and demo jig here. Update Jan 2023
This VDMOS subcircuit models jFET's, SIT's and Triode's, it adds effects including: