For articles on the VDMOS model and LTspice files for extracting parameters go to ---> VDMOS 

 

NEW Triode+SIT+jFET subcircuit using the VDMOS see the updated white paper here and the models and a demo jig here.

 

This new subcircuit adds important effects seen in jFET's, SIT's and Triode's including:

  • Gate-drain leakage current (IGSX) that changes with Vds and temperature
  • Quasisaturation for jFET's – it is significant for most small-signal jFET's
  • Noise and breakdown parameters are also included
  • SIT's (power jFET's) with Mu that varies with Vgs and/or Vds
  • Triodes Mu varies with Vgs, and 
  • Triode positive grid current modulated by Vak